pit.hpp

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#pragma once
#include "errors.hpp"
 
 
template <unsigned int ChID>
class PITController
{
 
public:
 
    //Period values are in microseconds (us)
    double Actual_period = 0; 
    double Req_period = 0; 
 
    uint32_t Clk_freq = uint32_t(24 * 1e6); 
    uint32_t LoadVal = 0; 
    const static constexpr uint32_t PIT_MAX_COUNTER = 4294967295; 
 
PITController()
{ static_assert(ChID <=3, "No such PIT channel exists!"); }
 
    void static enable_PITs() __attribute__((always_inline))
    {
        PIT_MCR = 0x00; //Write 0 is ON
    } 
 
    void static disable_PITs() __attribute__((always_inline))
    {
        PIT_MCR = 0x01; //Write 1 is OFF
    }
 
    void static pause_resume_PITs() __attribute__((always_inline))
    {
        PIT_MCR ^= PIT_MCR_FRZ;
    }
 
 
    void start() __attribute__((always_inline))
    {
        IMXRT_PIT_CHANNELS[ChID].TCTRL |= PIT_TCTRL_TEN; //Set BIT
    }
 
    void  stop() __attribute__((always_inline))
    {
        IMXRT_PIT_CHANNELS[ChID].TCTRL &= ~PIT_TCTRL_TEN; //Unset BIT
    }
 
    Error_t set_gate_time(double gt_microseconds) __attribute__((flatten))
    {
        double ldval_ = gt_microseconds * this->Clk_freq * 1e-6;
        uint32_t ldval = ceil(ldval_);
 
        this->Req_period = gt_microseconds;
        
        if(ldval > PIT_MAX_COUNTER)
        {
            this->LoadVal = PIT_MAX_COUNTER;
            IMXRT_PIT_CHANNELS[ChID].LDVAL = LoadVal;
            this->Actual_period = ((this->LoadVal+1) * this->tick_period_us());
            return Error_t::Counter_Overflow;
 
        }
 
        else if(ldval < 0)
        {
            this->LoadVal = PIT_MAX_COUNTER;
            IMXRT_PIT_CHANNELS[ChID].LDVAL = LoadVal;
            this->Actual_period = ((this->LoadVal+1) * this->tick_period_us());
            return Error_t::Counter_Underflow;
        }
 
        else
        {   
            this->LoadVal =  uint32_t((ldval)) - 1;
            IMXRT_PIT_CHANNELS[ChID].LDVAL = LoadVal;
            this->Actual_period = ((this->LoadVal+1) * this->tick_period_us());
            return Error_t::Success;
        }
    }
 
    double period_error_us() const __attribute__((always_inline))
    {
        return (this->Req_period - this->Actual_period);
    }
 
    double tick_period_us() __attribute__((always_inline))
    {
        return 1e6 / double(this->Clk_freq);
    }
 
 
    unsigned int static get_xbar_in_pin() __attribute__((always_inline))
    {
        if(ChID == 0)
        { return 56; }
 
        else if(ChID == 1)
        { return 57; }
 
        else if (ChID == 2)
        { return 58; }
 
        else if (ChID == 3)
        { return 59; }
    }
 
    void interrupt() __attribute__((always_inline))
    {
        IMXRT_PIT_CHANNELS[ChID].TCTRL |= PIT_TCTRL_TIE; //Set BIT
    }
 
    void no_interrupt() __attribute__((always_inline))
    {
        IMXRT_PIT_CHANNELS[ChID].TCTRL &= ~PIT_TCTRL_TIE; //Clear BIT
 
    }
 
    void static set_interrupt(void (*isr_fn)(), unsigned int priority ) __attribute__((always_inline))
    {
        //_assert_(priority <= 255, "Priority value should be below 255.");
        NVIC_ENABLE_IRQ(IRQ_PIT);
        NVIC_SET_PRIORITY(IRQ_PIT, priority);
        attachInterruptVector(IRQ_PIT, isr_fn);
    }
 
    void clear_interrupt_flag() __attribute__((always_inline))
    {
        IMXRT_PIT_CHANNELS[ChID].TFLG = 1; //Clear by writing 1 (TIF is the only field in the register)
    }
 
 
    void sel_FBUS_clock() __attribute__((always_inline))
    {
        CCM_CSCMR1 &= ~CCM_CSCMR1_PERCLK_CLK_SEL; //Clear CCM-Peripheral clock gate bit -> gate down
        Clk_freq = F_BUS_ACTUAL; //Set Equal to Peripheral Bus frequency  
    }
 
    void sel_24MHz_clock() __attribute__((always_inline))
    {
          CCM_CSCMR1 |= CCM_CSCMR1_PERCLK_CLK_SEL; //Set CCM-Peripheral clock gate bit -> gate up
          this->Clk_freq = uint32_t(24*1e6); //24MHz
    }
 
 
}; //End of class PIT Controller